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| UT54ACS74/UT54ACTS74 Radiation-Hardened Dual D Flip-Flops with Clear & Preset FEATURES * * * * * * radiation-hardened CMOS - Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 14-pin DIP - 14-lead flatpack PINOUTS 14-Pin DIP Top View CLR1 D1 CLK1 PRE1 Q1 Q1 VSS 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD CLR2 D2 CLK2 PRE2 Q2 Q2 DESCRIPTION The UT54ACS74 and the UT54ACTS74 contain two independent D-type positive triggered flip-flops. A low level at the Preset or Clear inputs sets or resets the outputs regardless of the levels of the other inputs. When Preset and Clear are inactive (high), data at the D input meeting the setup time requirement is transferred to the outputs on the positive-going edge of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The devices are characterized over full military temperature range of -55 C to +125 C. FUNCTION TABLE INPUTS PRE L H L H H H CLR H L L H H H L CLK X X X D X X X H L X OUTPUT Q H L H 1 14-Lead Flatpack Top View CLR1 D1 CLK1 PRE1 Q1 Q1 VSS 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD CLR2 D2 CLK2 PRE2 Q2 Q2 Q L H H L H Qo 1 LOGIC SYMBOL PRE1 CLK1 D1 CLR1 PRE2 CLK2 D2 CLR2 (4) (3) (2) (1) (10) (11) (12) (13) (9) (8) Q2 Q2 S C1 D1 R (5) (6) Q1 Q1 H L Qo Note: 1. The output levels in this configuration are not guaranteed to meet the minimum levels for VOH if the lows at preset and clear are near VIL maximum. In addition, this configuration is nonstable; that is, it will not persist when either preset or clear returns to its inactive (high) level. Note: 1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC Publication 617-12. 45 RadHard MSI Logic UT54ACS74/UT54ACTS74 LOGIC DIAGRAM PRE CLR Q CLK Q D RadHard MSI Logic 46 UT54ACS74/UT54ACTS74 RADIATION HARDNESS SPECIFICATIONS 1 PARAMETER Total Dose SEU Threshold 2 SEL Threshold Neutron Fluence LIMIT 1.0E6 80 120 1.0E14 UNITS rads(Si) MeV-cm2/mg MeV-cm2/mg n/cm2 Notes: 1. Logic will not latchup during radiation exposure within the limits defined in the table. 2. Device storage elements are immune to SEU affects. ABSOLUTE MAXIMUM RATINGS SYMBOL VDD VI/O TSTG TJ TLS JC PARAMETER Supply voltage Voltage any pin Storage Temperature range Maximum junction temperature Lead temperature (soldering 5 seconds) Thermal resistance junction to case DC input current Maximum power dissipation LIMIT -0.3 to 7.0 -.3 to VDD +.3 -65 to +150 +175 +300 20 10 1 UNITS V V C C C C/W mA W II PD Note: 1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS SYMBOL VDD VIN TC PARAMETER Supply voltage Input voltage any pin Temperature range LIMIT 4.5 to 5.5 0 to VDD -55 to + 125 UNITS V V C 47 RadHard MSI Logic UT54ACS74/UT54ACTS74 DC ELECTRICAL CHARACTERISTICS 7 (VDD = 5.0V 10%; VSS = 0V 6, -55 C < TC < +125 C) SYMBOL VIL PARAMETER Low-level input voltage 1 ACTS ACS High-level input voltage 1 ACTS ACS Input leakage current ACTS/ACS Low-level output voltage 3 ACTS ACS High-level output voltage 3 ACTS ACS Short-circuit output current 2 ,4 ACTS/ACS Output current10 (Sink) IOH Output current10 (Source) Ptotal IDDQ IDDQ Power dissipation 2, 8, 9 Quiescent Supply Current Quiescent Supply Current Delta ACTS VIN = VDD or VSS IOL = 8.0mA IOL = 100 A IOH = -8.0mA IOH = -100 A VO = VDD and VSS VIN = VDD or VSS VOL = 0.4V VIN = VDD or VSS VOH = VDD - 0.4V CL = 50pF VDD = 5.5V For input under test VIN = VDD - 2.1V For all other inputs VIN = VDD or VSS VDD = 5.5V CIN COUT Input capacitance 5 Output capacitance 5 = 1MHz @ 0V = 1MHz @ 0V 15 15 pF pF 1.9 10 1.6 mW/MHz A mA -8 mA .7VDD VDD - 0.25 -200 8 200 .5VDD .7VDD -1 1 CONDITION MIN MAX 0.8 .3VDD UNIT V VIH V IIN VOL A 0.40 0.25 V VOH V IOS IOL mA mA RadHard MSI Logic 48 UT54ACS74/UT54ACTS74 Notes: 1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V IH = VIH (min) + 20%, - 0%; VIL = VIL(max) + 0%, - 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed to VIH(min) and VIL(max). 2. Supplied as a design limit but not guaranteed or tested. 3. Per MIL-PRF-38535, for current density 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765 pF/MHz. 4. Not more than one output may be shorted at a time for maximum duration of one second. 5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at a frequency of 1MHz and a signal amplitude of 50mV rms maximum. 6. Maximum allowable relative shift equals 50mV. 7. All specifications valid for radiation dose 1E6 rads(Si). 8. Power does not include power contribution of any TTL output sink current. 9. Power dissipation specified per switching output. 10. This value is guaranteed based on characterization data, but not tested. 49 RadHard MSI Logic UT54ACS74/UT54ACTS74 AC ELECTRICAL CHARACTERISTICS 2 (VDD = 5.0V 10%; VSS = 0V 1 , -55 C < TC < +125 C) SYMBOL tPHL tPLH tPLH tPHL tPHL tPLH fMAX tSU1 tSU2 t H3 tW CLK to Q, Q CLK to Q, Q PRE to Q PRE to Q CLR to Q CLR to Q PARAMETER MINIMUM 3 1 1 3 3 1 MAXIMUM 21 20 15 19 19 15 71 UNIT ns ns ns ns ns ns MHz ns ns ns ns Maximum clock frequency PRE or CLR inactive Setup time before CLK Data setup time before CLK Data hold time after CLK Minimum pulse width PRE or CLR low CLK high CLK low 5 5 2 7 Notes: 1. Maximum allowable relative shift equals 50mV. 2. All specifications valid for radiation dose 1E6 rads(Si). 3. Based on characterization, hold time (t H) of 0ns can be assumed if data setup time (tSU2) is >10ns. This is guaranteed, but not tested. RadHard MSI Logic 50 |
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